Next: Organization
Up: Overall structure: Hierarchy-Aware techniques
Previous: Overall structure: Hierarchy-Aware techniques
We explain where memory-hierarchy aware techniques are usefully
applied in the field of parallel programming. The discussion includes
distributed, cluster and SMP architectures, that may be nested
hierarchically. Actually, several resources of a parallel system can
be seen as different layers of a memory hierarchy, like shared and
distributed memory, or local and remote disks managed by conventional
/ parallel file systems.
The emphasis is on the software aspect of employing HM techniques on
hierarchically structured parallel machines (other chapters cover the
issues of CPU-level caching and prefetching). Relevant topics are
- issues at the different levels that suggest or may prevent the
use of HM techniques
- what software tools are available at the different levels
- some external memory models (which we assume are explained in
other chapters) and their connection to bridging models for parallel
computation
- what HM solutions are employed in the various tools.
Massimo Coppola
2002-02-08